PLECS® Standalone is an autonomous software package for time-domain simulation of power electronic systems. If you want to be independent from other simulation platforms, PLECS Standalone gives you the all-in-one solution for modeling complex electrical circuits and sophisticated controls in a single environment.

The embedded fuzzy parsers accept any Verilog, VHDL or mixed HDL design code; even if the code is incomplete or contains errors. Syntactically correct HDL can also be linted to find problems not reported by the compilers.

HDL Companion has a unique setup of three main windows and a console window, which together offer a complete overview of your design, from high level structure to the details in the source code. The excellent navigation capabilities, including signal tracing, offer you an easy way to find an object and show its details.

The Console Window shows all syntax errors and warnings, which can easily be located in the HDL source using hot links from the Console Window to the Scriptum Window. The Console Window also functions as a Tcl interpreter, where any Tcl script or shell command can be executed.

Other features include a language sensitive text editor, revision control and interfaces to all major simulation and synthesis tools.

Explore HDL Companion Features Global view
- Detailed view
- Hierarchical view
- Signal tracing
- Search and replace
- Linting
- HTML generation
- IP integration
- HDL editor
- Integration with other EDA Tools

http://www.hdlworks.com/

Download File Size:30.95 MB

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