This book carefully details design tools and techniques for high-performance ASIC design. Using these techniques, the performance of ASIC designs can be improved by two to three times.

Important topics include:

- Improving performance through microarchitecture;
- Timing-driven floorplanning;
- Controlling and exploiting clock skew;
- High performance latch-based design in an ASIC methodology;
- Automatically identifying and synthesizing complex logic gates;
- Automated cell sizing to increase performance and reduce power;
- Controlling process variation.

These techniques are illustrated by designs running two to three times the speed of typical ASICs in the same process generation.

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