Reader's review:

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I am a designer who has worked heavily in both VHDL and Verilog. I have read the other VHDL/Verilog books by Ashenden, Armstrong, Perry, Skahill, and Palnitkar, and this is the definitely the best. It shows by example major concepts you can't get from acedemic texts. The most important thing about this book is the way it shows you how the synthesis tool interprets your code, which is the single most important aspect of VHDL/Verilog coding. It saves you the frustration of finding out by trial and error, and shows you ways of avoiding nasty synthesis problems. This book is a must for any serious designer's library, and great for starters as well.

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Download File Size:32.5 MB

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