Year / Release Date: 2016
Version: 2016.3
Developer: Xilinx
Developer website: www.xilinx.com
Bit depth: 64bit
Language: English
System Requirements: OS: Linux (64 bit) / Windows 7, 8, 10 (64 bit)
Minimum Disk Space: 20 GB
Recommended Physical RAM: 3 GB - 32 GB (it depends on the chipset family)
Description: The development environment for FPGA, CPLD firm Xilinx.
At installation Vivado Design Suite HLx Editions version of the program will ask for the installation:
Vivado HL WebPACK, Vivado HL Design Edition or Vivado HL System Edition.
Extras. Information: The Vivado Design Suite 2016.3 adds support for new families of chips:
- Kintex UltraScale +: KU3P, KU5P, KU15P;
- Zynq UltraScale + MPSoC: ZU7EV, ZU17EG, ZU19EG;
- Single Core Zynq-7000 Devices: XC7Z007S, XC7Z012S, and XC7Z014S.
Added New LogiCORE IP core:
- Communication & Networking
32G Fibre Channel (32GFC) Reed-Solomon Forward Error Correction
- Debug
Debug Bridge, In System IBERT, System ILA
- Memory
AXI AMM Bridge, HMC Controller.
Made an update for the following IP cores:
- Audio, Video & Image Processing
DisplayPort, HDMI, MIPI CS1 Controller Subsystems
- Building Block IP
Memory Interface
- Communication & Networking IP
Aurora, 10G / 25G Ethernet Subsystem, 10G Ethernet with 1588 Subsystem, AXI 1G / 2.5G Ethernet Subsystem,
UltraScale Integrated 100G Ethernet MAC / PCS, Tri-Mode Ethernet MAC Controller
- FPGA Features and Debug
High Speed SelectIO Wizard, System Management Wizard, XADC Wizard
- Bus Interface and IO
PCIExpress

Download File Size:20.64 GB

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