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Synopsys HSPICE vQ-2020.03-SP1 | 663.0 mb
Synopsys, Inc., the world leader in semiconductor design software, is pleased to announce the availability of HSPICE vQ-2020.03-SP1, the industry standard for accurate circuit simulation and cornerstone product within the Discovery AMS verification solution.
HSPICE vQ-2020.03-SP1 - What's new New Device Models and Model Revisions
HSPICE Q-2020.03 adds support for the following device models and model revisions:
- Mextram 505, Version 1
- ASM-HEMT
- MVSG-HEMT
- HiSIM-HV 2.5.0
Saturation Voltage Correction — The G Function Method
HSPICE now invokes a saturation voltage correction method to determine the saturation voltage of a small-geometry MOSFET, for a more accurate result. See Saturation Voltage Correction — The G Function Method in HSPICE Reference Manual: MOSFET Models.
Support for OMI Flow
Two new options, .OPTION OMIFLAG and .OPTION OMIPATH, add support for the Compact Model Council OMI flow.
Advanced Variability Analysis
The HSPICE advanced variability analysis (AVA) interface can now be used to run both high sigma Monte Carlo (HSMC) and Sigma Amplification simulations.
HSMC uses an advanced machine learning algorithm to select the samples in the tail regions of a probability distribution function and run a fast and accurate Monte Carlo simulation of these samples, which are more important for determining the failure probability and percentiles.
Sigma Amplification amplifies the standard deviations of all IRVs by a common scaling factor, to increase the number of samples in the tail regions, to enable designers to validate the circuit behavior in the tails.
The AVA dialog box allows you to configure the required inputs for an HSMC or Sigma Amplification simulation, save the configuration information, and launch the simulation with the saved configuration.
HSPICE supports a combination of distributed and threaded modes for both these simulations.
For detailed information on HSMC and Sigma Amplification, their target applications, and how to run an HSMC or Sigma Amplification simulation in HSPICE, see the manual — HSPICE User Guide: Advanced Variability Analysis.
3D-IC Support for TMI, Custom CMI, and MOSRA Models
HSPICE now supports the TSMC Model Interface (TMI), Custom Common Model Interface (CMI), and MOSFET Reliability Analysis (MOSRA) models in a 3D-IC netlist. For more information, see 3D-IC Support for TMI, Custom CMI, and MOSRA in HSPICE User Guide: Basic Simulation and Analysis.
Enhancement to .MOSRA and the HSPICE MOSRA API
Two new arguments to the .MOSRA command, namely earlyExitEnabled and postAgeSim, for gradual aging flow control and performance improvement of the HSPICE MOSRA analysis and custom aging model (MOSRA API).
S-Element Enhancements
Two new options, S_PRUNE and S_PRUNE_RC control the S-element pruning function in HSPICE, used to prune large dimension S-elements to smaller dimension models to improve performance.
IBIS 7.0 Support
HSPICE now supports IBIS 7.0 broadband Interconnect models. See Interconnect Model in HSPICE User Guide: Signal Integrity Modeling and Analysis.
Support for Eye Diagram Measurements in Post Simulation Measure Flows
The HSPICE simulator now supports the .CREATE_EYE and the .MEASURE TRANEYE commands in the post simulation measurement flows with -meas measurefile. For more information, see the description for -meas measurefile argument in Invoking HSPICE in HSPICE Reference Manual: Commands and Control Options.
Enhancements to HSPICE-ADE
HSPICE Q-2020.03 includes the following HSPICE-ADE enhancements:
- Improved HSPICE Corner Analysis Setup and Outputs forms, see Corner Analysis in HSPICE Integration to Cadence® Virtuoso® Analog Design Environment User Guide.
- Improved forms for setting up HSPICE distributed tasks and monitoring them, see Distributed Mode in HSPICE Integration to Cadence® Virtuoso® Analog Design Environment User Guide.
- Improved HSPICE measurement report view and support for post-simulation measurement in the HSPICE Measurement Utility.
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HSPICE is the industry’s “gold standard” for accurate circuit simulation and offers foundry-certified MOS device models with state-of-the-art simulation and analysis algorithms. With extensive usage in analog/RF/mixed-signal IC design, cell and memory characterization, and chip/package/ board/backplane signal integrity simulation, HSPICE is the industry’s most popular, trusted and comprehensive circuit simulator.
You can use it to simulate electrical circuits in steady-state, transient, and frequency domains. HSPICE is unequalled for fast, accurate circuit and behavioral simulation. It facilitates circuit-level analysis of performance and yield, by using Monte Carlo, worst-case, parametric sweep, and data-table sweep analyses, and employs the most reliable automatic-convergence capability.
Synopsys Tutorial Part 1 - Introduction to Synopsys Custom Designer Tools
In this video we're going to show how to use the Virtual Machine that's specially prepared for IC Design using Synopsys Tools. We'll see how to use Synopsys HSpice Simulation, Synopys Hercules Design Rule Check (DRC) and Layout vs Schematic tools (LVS), and finally, Synopsys StarRC's Layout Parasitic Extraction (LPE) tool.
Synopsys Tutorial Part 2 - Custom Designer Schematic Capture and HSpice Simulation
Synopsys, Inc. is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia.
Product: Synopsys HSPICE
Version: vQ-2020.03-SP1
Supported Architectures: x64
Website Home Page : www.synopsys.com
Languages Supported: english
System Requirements: PC *
Size: 663.0 mb
* System Requirements: - Windows 7, 10, Server 2016
Only memory can limit the size of the circuits that HSPICE can simulate. As a 32-bit application, HSPICE can address a maximum of 4GB memory on UNIX/Linux depending on your system. While on Windows, HSPICE normally can address a maximum of 2GB memory, or maximum of 3GB memory with Windows large memory mode enabled.
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