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fixed in XCELIUM20.09.001 =============================================
Title
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| Jupiter simulation failure (was ~4x sim slow down)
| xmvlog_cg: *E, NOTPAR with both xprop enabled and -access +rwc
| Internal exception when calling finish with DPI present in environment
| Use of * does not work with -isolation_signal
| Xcelium 20.07 AGILE crash in Assertion
| OTF GC during string match causing wrong results
| sv_seghandler coming from sv stream
| X-Propagation Disabled for No if and no case in VHDL
| Need to resolve amsspice warning about multiple -libmap and multiple -top, incorrect bindings since the provided libmap
| LP AMS Elaboration Crash
| Typed contructor Elab changes
| The number of UDP inputs allowed exceeds current maximum limit (15) . Is there any workaround possible for error UDPNIN?
| portbus with width greater than 2000 causing increase in elaboration time and memory
| xmelab performance - after cu_optimize::cu_zoptimize
| Driving list of bit port fails
| lwdgen performance issue - nested forgen
| Option -autofetch is not properly managed along with other options
| remove lps_enable_merge_ho_split from NEWPERF
| fanout information for expanded nets
| SYSTF INVHIER when passing hierarchy that includes space to -xmhierarchy
| when lps_infer_upf_supply is used MULSPLY is not created when there are conflicting drivers
| Investigate: Parameter displayed as -1 instead of actual value in LWD - correct in Snapshot
| vManager Client crashes when trying to rank session runs including Formal runs - root cause is not clear
| XMSIM internal error MESSAGE: ams_pwr_net2dms_enable
| Runtime error at method_port invocation from SV class instance
| uvm_re_match returns wrong match result
| waveform annotation and power browser infromation for isolated modport signal is incorrect
| xmsim: *F,RNDUNR: XCELIGEN assertion failed - elem->is_field()
| internal error in South *F,MCEASRT
| MESSAGE: sv_seghandler - trapno -1 addr((nil))
| Xcelium build crash "Illegal writer – cag_get_driving_expr" (xmelab)
| xmsim *F sv_seghandler
| Indago does not support showing isolation rules on interface signals
| -ii_write doesn't work for NBAs in packed MDAs - further enhancement
| RD; Use dot as a hierarchy separator for generate blocks in 'find_objects'
| Using verilog compiled configuration in vhdl: BILCNF-error when using makelib/endlib
| update XRIO upf file to include location self
| Allow writing of mixed OOMR (from SV terminating in VHDL) support for additional VHDL datatypes (integer, real, arrays of above)
| Randomization clone not reproducing the contradiction message
| Support the -delay_udp_xminitialize option when Jupiter supports xminitialize of state variables.
| getting xmelab internal exception during ixcom compilation flow
| var_opt_core optimization causes a Specman warning: DEPR_VERILOG_WIRE_UNDEFINED
| Elaboration of VHDL with Generics issues Error *E,GENXCOV
| uvm_re_match has different behavior when string order is different
| Add Multi-core support for -force_sequdp_xminitialize
| Fix the can_apply_ff_sens for x_latch_out
| Improve calc_ff_sens_index to distinguish between ranks of clk temperature
| False warning *W,RNDFUNAC when static variables are in functions
| Unexpected VIFUCOM not in 20.05.v002
| CUVUNF for out of primary function call
| CUVUNF for bind module in MSIE
| CNOIFC error not in 20.05.v002
| Spurious SVINMP for interface in bind
| GLS: support DU names size more than 1023 character
| Spurious LIBNOCON for internal power of liberty inside another liberty
| Partitioner does not discard partition which leads to MSIE real to unreal boundary port connection error INCUSC
| Misleading errors for procedural concurrent assertion
| NOTPAR error at elaboration
| Unexplained ITPREF error
| Xcelium giving build error when SVA sequence is named "followed_by"
| redundant pak files are created and being read in bbox flow
| CLONE - Elaboration Error (INTERR)
| xmelab error: *E,VIFUCOM - incremental snapshot
| The always block does not execute inside a power aware model.
| Elements in Tcl list for isolation are not being processed
| xmvlog_cg crashing for user defined system task function call
| Tool Crash(INTERR) during Elaboration - cu_vifc_verify_lpvi_msie_combination
| UPF VCT is not mapping real value for UPF Voltage from UDN VDD net to UPF supply_net in 20.03-v
| -profile ,-prof_dump options does not work for a hang simulation
| xmelab INTERR : cu_vifc_check_access - unmark flags mismatched
| xmvlog crash with message "apx - can't abstract pointer"
| Elaboration crash when bringing up Modem environment with Xcelium
| TRAT Ignored constraint (wrong solved results)
| xmelab Internal Error in Low Power
| xmelab CRASH with $error( $psprintf("%d ",$time) );
| -xceligen oc_format=1 doesn't work
| Could not impose constraints on protected int queue: Internal error
| MULSPLY highlights a bug in incorrect PG connection
| Source Code for scopes are not displayed in MSIE LWD
| -mce_acc_estimation not allowing to complete simulation. Gives ZD loop warning.
| TRAT seems to drop constraint and cause contradiction
| Solver generates incorrect value in TRAT mode for implication constraints
| E,DLNORD with successful compile
| xmelab crash with cuabv_cmp_asrt_details_by_pibid
| Internal error with MSIE xmelab: *F,INTERR: INTERNAL EXCEPTION
| Solver timeout on foreach loop in constraint
| supply nets causing NACCed items
| Continuous assignment delays on combinational cells being NACCed
| Randomization fails without information, doesn't generate tc clone
| Primary recompilation while using MSIE single step flow
| Primary elaboration crash with UPF
| SVRNM: Support for $value$plusargs statement in a resolution function
| INTERR MESSAGE: gq_st_gen_swbabp - class default
| Performance issue with 20.05 non-blocking assignment
| Tool Crash during simulation when TRAT - solver enabled
| Randomization stuck with MOD operator
| Replicated Top + Spice OOMR is generating CUVTNH errors
| property wrongly activated when ##PARAM
| Optimization breaking functionality in a fork block
| Enum signal is incorrectly text-ref annotated with localparam value of same name
| Elaboration crash while making an incremental snapshot of DSS
| simulation failure with Jupiter early access w464
| simdiff : start_time end_time not working correctly
| Support number of partitions control in automsie flow
| simulator locks when probing at time 0.
| New SVAMS Parser (-svams_2019) nullifies the effect of -honorvams
| *E CICINT error when mapping scalar net type in concatenation
| 20.05.a001 MESSAGE: ams_pwr_net2dms_enable xmsim: *F,INTERR: INTERNAL EXCEPTION
| specialize_if_type_has_covergroup incorrectly uses wrong type for instances with different type parameters used
| Coercion fails with Auto MSIE
| xcelium coverage command generates *E,GENXCOV for vhdl-2008 generate
| Debugging profile entry ENABLE(n), tail, rtn (method)
| xmelab error with NOTPAR
| Signal tied to '0 not corrupted correctly during shutoff
| LWD support in MSIE bbox flow for Indago
| X-prop distinct warnings for XFOVRD with same mode and different
| Random stability lost when adding breakpoint or reset
| Signal tied to 0 does not get propagated at power up
| xmelab error: *E,VIFUCOM when running using EHF 20.06.e436
| setting vc call back on indexes changing specific indexes: all cb methods are called
| CUVUNF reported when -automsie is used, for an object that is accessed in CU scope
| could not process distribution constraint due to change in polymorphic handle type
| Simvision does not display type definition for reg type state in FSM.
| simulation mismatch related to xprop CASEXZ and UCASE
| CUVDSI warning generated as xmelab cannot connect signal in parent generate block via .* port connection notation
| randomization crash: xmsim: *F,RNDUNR: XCELIGEN assertion failed
| Simvision save command script has spinning wheel when selecting different location.
| Receiving INTERNAL EXCEPTION when running xrun -mcl option.
| [Xcelium] Compatibility between Xcelium and OpenSSL on RHEL-7
| $cged is returning incorrect value when EEnet is initially driven to zero volts
| DMS Performance: Reduce Digital Islands overhead for customer SV+SPICE(co-sim) designs
| MSIE+SVRNM: SV wreal size mismatch and one bit bus to scalar
| Elab with VTW crashed with MESSAGE: sv_seghandler - trapno -1 addr(0x15d951d620)
| Sequence time is not expanding at the end of a simulation
| Elab crash with UPF
| Replicated Top + Spice OOMR - strange tool exits during xrun reported by customer
| Replicated Top + Spice OOMR - strange tool exits during xrun reported by customer
| Dynamic Test Simulation Crash in native code (unknown stream)
| uvm_hdl_force on typedef struct throwing an error
| MESSAGE: sv_seghandler - trapno -1 addr((nil))
| CUVURH warning not generated when RTL compiled as SV
| $bits with XMR to SV interface failed - xmelab: *E,NOTDOT
| Internal exception when simulating after putting breakpoints in UVM code.
| ELAB *F,INTERR: INTERNAL EXCEPTION, dt_get_known_datatype hit unknown datatype
| local param calculate result different from DSG tools and other simulators
| RNDCNSTE out of bound index in array reference found on CX mode
| xmelab locks files despite -nolock -rexp
| Functional failure with assignment loop due to -enable_forgen_amalg
| genafile does not add typedef datatype with uvm_hdl_force
| Solver does not honor constraints in foreach loop
| x-prop clock and reset not reported as possible drivers
| Randomization difference between AARCH64 and X86
| Configuration step on LinuxOnPower returns error against transrecord.
| automsie does not work with -fast_recompilation
| Allow primtop with multiple views for the same module
| xmelab 20.06-e404-20200525 INTERNAL ERROR
| Light weight bbox solution
| genafile does not add signals with uvm_hdl_force to afile
| XRIO: Need to have a soft-error when signal specified in iso_enable field (converted to -isolation_signal by xrio) doesn't exist.
| . is replaced with / in the instance name in find_objects command
| Performance optimizations in CCPMU
| Enhance Tcl cmd tcheck to support "-recursive" option to support all beneath level instances
| VTW fails to convert local logic signals
| The memory consumption keep increasing as xmsim runs when xprop is enabled.
| Extremely long +incdir path results in Internal Exception during xmelab
| rnc internal variable not disabled by rand_mode(0)
| Wrong sim behavior due to deadcode optimization in Xcelium 20.03.v001 and on.
| Customer gets CUIMBC error when connection path has bind
| xrun restart cannot find verilogA compilation directory
| Serial engine generate inconsistent default seeds
| -ii_write doesn't work for packed MDAs - further enhancement
| -ii_val causing incorrect behavior on packed MDA
| xmelab INTERR when using -newperf in low power build
| ii_val breaks with certain code
| consistency checking xmvlog/xmelab/xmsim.args between Save Sim vs Dynamic Test Sim
| Weird parser error that writes out chunk of source code in log file
| xmvlog: *E,CHRINV - parser failure. Also an unclear message was printed
| Fix issues with isolation and repeaters
| need to find a way to run -mce_acc_estimation that uniquifies the mce_xray.txt and the xmprof.out
| 3X elaboration time with bbox vs. no bbox MSIE
| Internal Exception: MESSAGE : sv_seghandler - trapno -1 addr(0x2af719025a28)
| Elab takes 24hrs to finish
| xmvlog locks many files despite -nolock -rexp
| An instance within a upf_dont_touch domain gets corrupted at power shut off
| via_get_ots_field:No ots structure of kind 52 exists
| TYCMPAT Error for package compiled in two different library with xrun 3 step flow
| xmvlog crashed with message: mnemonic doesn't match any registered mnemonic
| Error on ixcom +uvmDut flow with two uvm packages
| Xcelium crash after adding lps_common_options on version 20.03
| Elaboration time slowdown when using -access +r.
| vct specified on wreal and real are not getting resolved correctly
| UPF R* build time highly increase in 20.03
| always_comb block not getting triggered correctly
| TRAT: Internal exception when a source file used in snapshot, is removed
| Solver incorrectly reporting conflicting contraints
| RNDFUNAC messaging and functionality needs improvement
| optimization for set-resetable latch to not call table_seq if data unchanged
| Linter can't error out on deprecated commands
| Test SHM
| Automatically Nacc instances under Compressor/Decompressor instances
| compilation error when file is encrypted
| xmelab internal error, cu_propagate_expand - vector ring corrupt
| iteration limit timeout
| gui displays show domain as "corrupt" when running xrio
| Solver fails simple bit-slice constraint
| TRAT incorrectly detects oob error
| xmsim: *E,SYSFMT (io.sv,63|25): $value$plusargs – value found '0x6400000' for plusarg 'nitro_io_base_addr=' does not match specified format.
| MSIE+RNM:TYCMPAT error while doing partition at boundary having one bit bus to scalar connection
| Support of constant number as actual port in untyped checker instantiation
| uvm_pkg is elaborated on the incremental
| xmelab INTERR in Green
| 20.04-e281-20200419: xmelab: *E,UDFUOBJ: when generating info for latch based reset, for level_shifter
| SVRNDF - Constraint failure for solving unsigned integer dynamic array in to foreach loop
| -largest_path_delay is not giving expected behavior
| xmvlog: *E,CGIANS Arrays of covergroup instances are not supported.
| xmelab: *E,ALOOMN - Illegal use of assertion label or instantiation of a property, endpoint or sequence.
| *F,INTERR: INTERNAL EXCEPTION - XLM migration
| XFSG is unable to exclude untestables in standard strobe mode
| Xceligen Solver unable to generate the same random numbers during reset & restart with -xceligen on=1903
| Corruption of looping variable by Low Power
| solver_order_alg gives wrong distribution on inside list
| Internal exception at SDF elab: Message: sv_seghandler - trapno -1
| Elaboration error : AMSILC when DVS CM are used with VHDL hierarchy in vddnet
| xmvlog_cg showing high memory usage during Xcelium build for SM unit
| adding -enable_cuv_ewaitset and -enable_typebasedchk to newperf
| SimVision Create Bus from Range errors out
| Source Annotation takes long time on signal #1
| ASNUSE - Force of member-select for unpacked structs
| tcheck to support depth all or * till deep hierarchy
| Support for arrays of cover group instance
| SV IF signal's value is not being updated due to CB optimization
| RNDCNSTE error for unsupported built in functions call in constraint
| textref in RTL not aligned to text when using -ext_src_info
| Need a TCL Variable / Method (either will do) to identify end of simulation
| Internal exception with Fatal error (CMI-2010) because of Assertion failed in file esimBccoToSam.cc'
| Dynamic loop does not wake up
| DMSDEBUG: Deliver MXNET Phase 2 to agile
| wrong *W,CUVIHR issued at elaboration
| recompile failure of library file in msie mode
| Simulation crash with sv_seghandler - trapno -1 addr(0x28)
| always not waking on input event
| XLM doesn't support array of covergroups
| UPF and RTL connection
| LP - Buffer input is 1 but the output X
| UPFEERM when using -applies_to_boundary in set_level_shifter command
| EXPPAR for process::self without parentheses
| E,CUCPTM: type mismatch over port association
| Outputs connected in gen-for loop remain 'z during sim.
| Support for shortreal inside unpacked struct used in DPI
| check in AVSREQ-107603 Make -lps_time0_isox and -lps_replay_comb_always default
| Suppress EILLCT error for illegal_bins generate
| mce_run.log seems to have overflow in simulation time
| SV+SPICE: xmelab Internal Error due to bblist
| wrong setup timing violation reported with ntc_level 3
| Backdoor constraint problem: could not find a rand variable named: <var_name>
| Simulator existing due to constraint processing errors with backdoor
| INTERR sv_seghandler - trapno -1 addr(0xffffffdb) in ipi_cbFast_cuf_int
| XMELAB:Tool Crash(INTERR) with MESSAGE: dtv_vifc_find_vii_inst - not a module level DU
| Crash with via_get_ots_field message
| customer model: xrun -f elab.f hangs for long period of time
| Accuracy issue when reading multi-dimensional wires of > 32 bits through PLI
| isolation on outside module is not like clamp value
| SVRNM+LP: Elab INTERR with 20.03
| Increase in build time with Default blocks
| Internal Error with message - vst_identifier () bad class
| Bind to parent library
| VHDL report REPORT/FAILURE from procedure @std.ENV:STOP
| xprof dump is taking almost same amount of time as sim due to 0% cpu usage
| xfr crash in FSV testcase
| FATAL error during simulation, xmsim: *F,NOFDPI: fatal error within protected source code
| min clone doesn't compile
| 20.04-e278 leads to elab internal if no access given
| localparam has wrong value when using parameter from macro with $clog2 to size value
| Crash on CG at NY with if_reserved.constprop.84 in bpad
| customer design ZDEL ATPG fails in south elaboration
| Update LTW message codes to VTW
| Tool Crash with TRAT during simulation
| hview banner and MCE_HOME banner not in sync
| hview took too long to report back can't find split_rtl_paths.txt
| 20.04-e274 leads to DUT errors only with -enable_var_opt_core
| Spurious NOLIBAS note for power aware model with UPF
| xmvlog_cg internal error : tl_prone_reader - no dp for net
| Processing of "-run" or <Input.tcl> takes place prior to launching to GUI
| Sign Off: RELAX_SVBMUF support in MSIE
| No liberty connections for liberties inside PA model with UPF
| add the "mce_" prefix to the flag sim_cpu_configuration
| Question about cause of CRCCON warning.
| xmvlog: *E,NOTTXX - Expecting a task name [10.2.2(IEEE)].
| VTW optimization not applied
| Internal exception when starting a saved snapshot.
| XFS Net Semantic - crash with fault_net_jg
| Enhance local_oc to show more targeted information
| Big slowdown on continuous assignments in generate loop
| xmelab *F,CUITOP message unhelpful for understanding error
| 1G RDWAD registry data is loaded in LPX sim
| xmelab crash with cu_qualify_ifgen_amalg_assigns on stack
| ValueChange cb does not trigger at a change in object
| XFS Net Semantic - incorrect vector net information in UCIS
| 1330237 CCR IES to support process::self call without parenthesis
| Xprop ordering issue with MODULE directives
| Spurious W,SVINMP for interface not on the boundary
| Support needed for more than 15 UDP inputs
| ELABERR: FATAL error observed with MSIE flow
| Flash Memory: "-enctran" waveforms mismatch
| wrong hold timing violation reported due to multiple conditional checks
| elab crashing in after 2020 kits
| Libcache : Handle cleanup of cache dirs if no readers for some specific period of time
| Simulation internal exception error while using "-fault_boundary" running fault simulation
| UPF The state cannot become partial_on when supply net and supply port are same name.
| LP with X-prop simulation performance degradation with 20.03.v001rc2
| Not able to deploy parallel elab on a GLS design
| Request to improve the performance of $fread
| Always_block still consuming more.
| For customer case, the elaboration time of Xcelium19.09 takes three times that of IES 15.2
| random constraint issue, generating out of range value for one randomize call
| Support for Union Coverage Merge on bins level
| TYCMPAT error caused by the presence of an AMS (VAMS) instance in simulation containing AOIs with SVUDN ports
| xmsim INTERR with 20.03 e211 kits and var_opt_core and x_latch_prune optimizations
| Need to be able to enable coverage on parameterized modules without uniquifying type parameters in module name
| Support of DELBUF in customer design
| Enhance "-enable_single_yvlib" to be able to change the default name "single_yvlib"
| Support -msieunlock oopr_to_class in multi-step MSIE flow
| Constraint failure for certain seeds
| inverter input not waking up after initial power
| 'Save Command Script' -> browse issue
| Segmentation fault in ipi_getTime() during elaboration
| item.index not supported in constraints
| MC Codegen is taking too long
| Un-initialized variable issue in CDP ACA
| Strange slowdown during compilation of a file that compiles fast standalone
| bit type variable gets X or Z when it can only get 0,1
| Document -nocover option
| xmvlog_cg crash for function call in constraints
| TRAT behaves differently than pre-TRAT for oob associative arrays
| xmelab: *F,INTERR: INTERNAL EXCEPTION with SVRNM, SV-AMS and custom connect modules
| Internal Exception while giving type error
| Unable to reproduce random sequence between 19.09 and 20.03 (package class static init)
| create optimization that can recognize tranif and gate logic that can be transformed into a mux
| xmvlog crash: Verilog syntax tree (SystemVerilog package)
| customer requested enhancement to support create_power_switch "-output_voltage"
| MSIE error related to "reference from primary to incremental"
| soft constraint that should be ignored gets overconstrained and fails the call
| ENABLE_PES_WOOMR missing from -newperf
| Huge dynamic memory(run time snapshot) consumption in IWB xcelium simulation
| RTNCCER error with lps_rtn_bit_precise
| *E, ECGWCK, Syntax Support for Wildcard ignore_bin
| Compilation failure (SIGABRT) due to too many south phases
| xmelab INTERR when doing cloning on CPU ecore
| using xmroot under the hood for MC support tools is dangerous and should result in an error if mismatched
| always block inside gen-for loop consuming a lot, contributing to huge ACTIVE WAKEUPS
| hview fails to run for Jupiter
| huge slowdown when injecting faults
| xmsim: *W,RNDARS: Array resize error in randomization constraint
| VTW optimization not kicking in, for this scenario
| xmelab crash Internal exception error cu_vifc_check_access - mark flags mismatched
| CDP ACA creation
| TRAT not honoring the inline constraints
| Internal error when probing UVM hierarchy
| build time > 10x of SC for Jupiter
| UPF supply_map not making connections to VDD pins if supply ports/nets are defined after the apply_power_model
| INTERNAL EXCEPTION : MESSAGE: svhrc_dec/ svhrc_inc - EXTERNAL/INTERNAL
| Bins empty for enum transitional coverage
| xmelab crashes with MESSAGE: sv_seghandler - trapno -1 addr(0x1788)
| *E,MLPFAG Macro used as macro parameter not supported
| Internal error during simulation - seg fault in PDBox
| Cont Assigns taking 88% time. Need to tune sim performance.
| MSIE - make features: -msieunlock class_spec_perf and -msieunlock class_spec_perf_phase2 default.
| Jupiter build time 4x of SC
| sv_bushandler - SIGBUS not in rts_xfer when reseting the simulation and when a specific object is probed
| create an error if there are conflicting domain_interface_def specifications
| Autofetch feature in 20.02-e055 does not capture correct source file path information
| Incorrect random values generated yet randomize() succeeds
| TRAT produces incorrect randomized values
| xmelab crash due to duplicate .o files on command line
| Fault Instrumentation: document whether SV RNM and wreal re supported for fault injection/propagation
| [VHDL xprop] [Enhance Request] Supported for VHDL-XPROP internal variable
| Environment variable to control randomize breakpoint behavior
| xmsim INTERR while creating disasm.out: gc_doF - switch (fffffff5:5)
| xmelab INTERR with -rwc access: vsto_ots_pointer - zero offset
| Multiple driver elaboration error introduced in skeleton
| Improve cone merging for sequential UDPs
| an obj path with trailing space fail on vpi_get /read/write access although it has
| Power down function does not corrupt output of NPA comb-cell at time 0
| SVRNDF found with TRAT (without error_on_oob=0)
| TRAT detects incorrect rand mode
| INTERR sigsegv in cdpr_find_node
| Find objects command does work with protected code
| xmprotect make errors into long files encryption( ~582k lines)
| UPF does not accept backslash to bit slice an array
| xmsim INTERR: vst_index_datatype () - invalid class, class 829
| clean accidently adding of tran to floating nets
| Please add an informative message to the 'nothing to show' screen in xProf
| The flags -plusperf -newperf cause a VPI error at event registration
| Rebuild happens without a change in VST and the rebuild time is twice the scratch build
| Bit-select of SV interface array connected to electrical net inside a instance shows CUVDNF error
| xmprotect encrypted files has error
| NOTDOT error to reference sub instans param
| long time spent in system calls in single-core relative to multi-core
| running a test in a UVM testbench with VIP results : xmsim: *F,INTERR: INTERNAL EXCEPTION.
| xmvlog_cg performance
| xmelab fatal error (cu_check_osca_rhs)
| Indago ESWD hang in the loading screen
| xmsim: *F,INTERR: dt_is_array hit unknown datatype (VST_T_TYPE_PARAMETER)
| [Xmprotect IEEE1735] Encryption envelope parameters are dumped in a format which is not recognizable by other tools
| xmelab internal error with -amsdropt
| Different constraints being mapped to same variable in clone
| xmelab fatal error with MESSAGE: sv_seghandler - trapno -1 addr((nil))
| Simulation mismatches in MC GLST simulation
| xmelab crash - cfn_execute_stmts - unexpected statement (VST_S_BUILTIN)
| Why is profiler referencing NC_TO_BOOL when user is not using that function
| E,ILLPRI with nexttime
| spurious LIBINPA related to internal_power signal in liberty
| xmsim INTERR rts_ra_wakeup - wm_method when doing $fread
| simulation errors NCNOFA and EMIRR
| xmsim INTERR svhpa_traverse - no parent datatype when using parameterized mailbox
| xprof hang when loading DB
| Source .svcf file for multiple database in Simvision Analysis Environment.
| AI CCR for internal
| xmelab Internal error on low power build
| xprof topping out of memory reading in a db
| create a switch to allow serialization of mccodegen
| No means to bypass SVUNSTE in Xcelium
| XFS Elab Internal Exception on Customer Design - Critical Issue
| simulation SIGUSR error when using MSIE+systemc module
| xmelab: *E,BNDERR (./test.sv,18|101): Bit-select or part-select index out of declared bounds.
| The connections of a wire coerced to wreal is ignored on Liberty models
| Randomization constraint failure
| Massive amount of time spent in a loop
| New *E,RTNCCER in rebase RC 20.02.v001 which wasn't seen in 19.12.v001
| CODBIG during xmvlog_cg
| Capture-Replay: support time shifting replay values
| INTERR: xmvlog Unexpected signal #11 (p3_hacked_class_scope)
| Wrong #1step sampling in clocking block
| *E,NLRMO error when trying to compile the ske.sv
| MULSAF error Multiple dumpsaif executions not supported errors with -lps_analyze
| internal error when using -mce_acc_estimation
| Liberty Filename is not being displayed in Liberty Verbose Information
| Use of forces with power aware models cause INTERR
| Struct is assigning to handle instead of copying
| Nested randomization for leaf level object does not work.
| Localparam not recognized inside nested for generate loop
| can annotation errors in multi-core (XUFE) be made into a warning like single-core?
| Xcelium becomes unresponsive during a low power simulation
| Generate isolation only UPF file from user input text file and pass to xmelab (Phase1, integrate the xrio script)
| Need solution for merge of MDA of different sizes
| codegen internal exception with "MESSAGE: gq_e_this_and_super - no thisswboffset"
| xrun "-reflib" option changes timestamp and size of referenced compilation library
| VHDL Support for predefined attribute element
| xcelium crashes with internal error: Open fail in set cpulogs
| Xcelium elaboration reports CUVHNF error but Incisive could pass
| FSM not extracted due to logic in combinatorial block using struct element
| Give MCEHME error with Jupiter if path given with MCE_HOME is incorrect
| Toggle coverage for enum not as expected
| VHDL input staying unexpectedly at 'UUUUU' throughout simulation. Drivers not intuitive to root cause it. Need help
| Dynamic memory profling missing info in memdetail report
| xmelab crash with subelem_chain_next - cannot descend to datatype (748)
| Crash when recording flow of SV mailbox during mailbox creation
| search path to avoid *E,MTOMDU: More than one unit matches on -top
| xmelab: *E,ILLCNDM: [LPS] No design object is found for name in control condition: "powersys_sram_nxp_peri_pd_b*[0]", position 1 (/mercury.upf:419).
| Jupiter runtime *F with invalid params –force_flags
| automatic variable confuses assertion
| Case failing with string in elaboration time function
| argument to $bits seems overly restrictive
| -yv handling different in vcs vs xcelium
| XProp Instance-Level Statistics Display in SIB Based GUI
| Enhancement: enable undo liverecording for xmvlog_cg
| ncvlog_cg: MESSAGE: gc_qlshift - word overflow
| Spurious NOIMDR when reg is used as a wire
| Interface Self reference fails with TYCMPAT for AOI
| MS Prototype: Add internal option to downgrade EXNEUS error for design debug only
| COD/SIG file written to precompile libraries (reflib)
| Use of relax_svb* for customers?
| Crash when using cross coverage with ignore_bins with expression
| assertion glitch to "failed"
| Xcelium should issue a warning when a soft constraint is discarded
| macro expansion issue with escaped name
| -ii_wwarn enhancements
| MT_VAR(rts_gd_start)->gd_gr_icl is corrupted by "Stream rts_xfer" – xcelium internal exception error at "drivers -active" command at xmsim
| Re-elab with no apparent reason and using -fast_recompilation
| Text-ref do not appear in UPF
| Liberty log should not report "null" string when liberty does not exist
| save/restore intermittently not working while running several tests in parallel
| Boundary port information defined in update_power_domain -user_attribute{boundary_port..} is being flagged with the ILLBPT warning
| Fix failures under different modes
| create empty dpiheader if -dpiheader is being used
| Indago does not show isolation on struct member outputs
| TCL force stops taking effect without force or release
| LP simulation significant slowdown when adding the flag -lps_1801_msg
| -libcache: Improve excessive simulation loading time
| Need solution/explanation for "xmelab: *W,FTSTCT: [LPS] Streaming concatenation at (./module_a.v:8) ignored for low power.
| xmelab: *W,NOIMDR: [LPS] The port (top.dut.x.xx.xxx.xxxx.x) has multiple drivers and cannot be isolated by rule x
| Avoid pessimism in array corruption feature, corrupt desired bits in case of variable index
| Static analyzer is required to be enhanced for removing unnecessary simulation activities.
| $sformat introduces an empty space at beginning of string handle
| FLI C Interface LD_LIBRARY_PATH Interpretation
| INTERNAL EXCEPTION occurs during elaboration
| INTERNAL EXCEPTION occur during fault machine simulation
| rts_abrthandler internal exception scenario
| Warning TRZDGOC : Possible zero-delay gate oscillations detected: When -mce_acc_estimation option is added
| *E, RNDXZW Constraints reference an X/Z value.
| simulator internal exception assertion and xprop
| RNDCNSTE error: Field of struct not supported in solve/before. Causing SVRNDF error
| Issue a Warning when a type real is assigned to a wire
| Internal Exception with xmelab 1909
| VPI cannot cope with value changes on string typed values.
| Xcelium crashes during SDF annotation
| odd UPF behavior with -lps_dbc with checker not detecting threshold
| TCM Extension With Different Sample Event
| ILLSSCI Warning -Need to specify Instance name
| Single step MSIE internal error - ie_create_master_spines
| Xprof GUI showing unexpected high activity for a particular interface instance
| OPDB error when probing in 32 bit simulator.. 64 bit works fine
| Signal not correctly driven after uvm_hdl_deposit in MSIE environment
| Failure of TLM2 transaction in the code processing extensions
| Request set_toggle_includex count transition as 0->x->1 and 1->x->0
| Request FSM extraction when FSM is using element of struct
| imc merge is incorrect for mda's when primary run has smaller array even with -initial_model union
| need to disable constraint debugger when using randomize(null)tes
| automatic variable in assertion fails - NCNOFA\EMIRR
| xmvlog: *E, SVCNIC embedded coverage group not instantiated in the 'new' method.
| simulation errors NCNOFA and EMIRR
| elab errors CUVIMG CUVUNF with assertion inside for loop and using loop index within the assertion
| xmvlog_cg: *E,CODBIG
| xmvlog: *E,WOUPYR for unpacked structs in clocking blocks
| Source code annotation is intermittently not available for a file
| option for relaxed binding rules followed when a component is being instantiated using default binding.
| simvision is frozen when opening register viewer in UVM 1.2
| Request ability to display range of fixed size vector bins
| xmvhdl_p: *E,ILLUCP error if an SV module port is not connected in VHDL
| Getting the xmelab *E,CGOPAS with option.goal in return statement
| Same testcase giving incorrect results with xcelium but not with Incisive 15.20s74
| CMI-2010 error caused by esimBccoToSam - module/interface parameter publish causes the tool to crash
| xmprep command returns *F,TOOMNW when set -work parameter
| support for arrays of covergroups
| incorrect unused library file warning (LIBNOU)
| Simvision browsing tab is not working properly
| The separator '/' is not supported for '-pattern' of UPF command 'find_objects'
| CRCCON warning messages in monolithic xrun flow
| System elaboration tasks in for loops
| FSM not extracted if FSM state is an element of a struct
| Request support of packed struct in clocking blocks
| Please downgrade ICFCLD warning to a Note
| UPF find_objects is not able to find the instance having special character
| Support for $past, $rose, etc inside task in class
| IMC Enhancement Request: Show coverbin range of values in GUI
| Report auto coverage bin ranges
| Getting spurious elab warning CUVIHR
| ncelab: *WCUVMPW :: if ncelab could report the faulty scope
| Concerns on the implementation of FINISH
| Request ability to display range of fixed size vector bins
| ILLSVF compilation error with sampled value function $sample
| Array ports on AOIs cause TYCMPAT error
| MSIE : Need to support dot-star in port map at primary boundary
| replay configuration file format lead to interr or error without correct message
| Add create_global_connection for domain mapped nets that are also physically connected at parent level
| RNDUNR: when using error_on_oob=0 to workaround out of bounds
| TYCMPAT error when connecting a bundle of wires to an EEnet port in an iterated instantiation
| xmvlog error ILLSVF when using $sampled inside a final block
| xmvlog: *E,ILLSVF error when using sampled value function $past inside a task
| SystemVerilog alias statement doesn't "alias" signal when passed through vhdl instance
| Confusing behaviour and errors when SV UPF package source file is not added and compiled manually
| Issue in VHDL generics instantiated in Verilog Getting error xmelab: *E,CFIGTC
| Create bus from range fails when super bus path contains generated elements
| Shouldn't "ncvlog: *W,POLICI" be an error by default?
| Bogus warning for SV import UPF::*
| ALOOMS In Design unit hierarchical reference SV assertions not supported
| Simvisdbutil -pwrincides option not dumping the indices of array in VCD
| Implement Analog Spectre/SPICE primitive in array of instances support
| Implement Analog port connections in array of instances support : xmelab: *E,PCAUNA enhancement
| covergroup constructor checking is too strict
| SVA issues NCNOFA and EMIRR error on automatic var in for-loop
| xmelab performance issue - checkpoint "after aoi"
| Support for isolation on interface modports
| Using "waveform print -page_height_number" TCL command generates an empty .ps file
| sampled value function needs to be supported in procedural code of a task
| Support to use covergroup option/type_option in RHS of an assignment expression.
| INTERNAL EXCEPTION: ncvlog sigsegv on reference to unit scope class from package
| internal error on coverage database creation
| the order of the covergroup definition
| Part select of concatenation
| ignore coverage of 0->x->0 and 1->x->1
| Unexpected APBKEY/APPDFT on conflict between field and type in assignment pattern
| Show values that make up the ranges in a coverbin
| xmvlog: *E, ILLSVF (../BFMs/I2C/i2c_if.sv, 128|65): Illegal use of sampled value function outside concurrent assertions
| Show values that make up the ranges in a coverbin
| GLS with SDF got internal error(sv_seghandler - trapno -1 addr(0x248b44))
| xmsim crashing in user code instead throwing SIGUSR but SIGABRT
| usage of $rose in task not possible: ILLSVF
| call static function defined in compilation unit from package lead to tool failure
| find_object to find an output port of an output port of an instance
| Warning for xfile override
| LPS tcl find_objects pattern matching doesn't support hier separator
| Add _XM_XP_INSTANCE_INFO type width='408'>

Download File Size:34 GB

Cadence XCELIUM 20.09.023

€60

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