Year / Issue Date: November 2013
Version: 2013b Build 15
Developer: Mentor Graphics
Developer website: http://www.mentor.com/products/fpga/synthesis/precision_rtl/
Bit depth: 32bit, 64bit
Language: English
System requirements: Compatible with Windows 7: complete

Means of high-performance FPGA logic synthesis type PLD and FPGA, optimized in terms of ease of use and high quality results.
Supports a multi-million -programmable systems -on-chip (FPSoC) last generation. Precision RTL Synthesis receive input on the project as a description in VHDL or Verilog and implements logic synthesis with the defined limits , based on built-in libraries of manufacturers. The package has a built-in static timing analysis , the ability to analyze and debug in incremental mode and an intuitive user interface that allows you to easily manage the process of fusion as an experienced engineer , and beginner.
Precision RTL Synthesis includes a unique optimization algorithm - Architecture Signature Extraction (ASE), which automatically selects the most critical in the project area, limiting the performance of the entire system, such as finite automata, logical paths between the different levels of the design hierarchy or logical path with a very large number of combinational logic . ASE algorithm uses heuristic analysis in an automatic mode to reduce the size of the project and increase its productivity without the need for manual intervention.
Precision RTL Synthesis is fully integrated into the design flow FPGA Advantage, including HDL Designer bags and ModelSim. It supports all series of crystals Xilinx, Altera, Actel and Lattice.

Download File Size:795.64 MB

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